PhD position- Fast and slow learning with new materials

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As part of a new MSCA Doctoral Network “ELEVATE” (101227453), we are offering a:

PhD position- Fast and slow learning with new materials

Location: Institute of Neuroinformatics, University of Zurich and ETH Zurich, Switzerland.

 

Earliest starting date: January 1st 2026.

The EIS lab (https://www.ini.uzh.ch/en/research/groups/EIS.html) at the Institute of Neuroinformatics (https://www.ini.uzh.ch/en) invites applications for PhD student position to work at the intersection of Electrical Engineering, Computational Neuroscience, and Machine Learning to help building efficient learning systems at multiple time scales. 

 

Research Background

At the EIS lab, we are neuromorphic engineers who are curious to explore how motifs from the brain’s morphology and architecture can serve as useful inductive biases to (i) improve energy and area efficiency of the neural network hardware substrates, and (ii) improve generalization, task performance and learning of AI systems. Our interests are therefore at the intersection of NeuroAI and hardware design.

 

Project description

When deploying an AI system into the real world, the data it operates on can be very different from the dataset it was trained on, because environmental conditions and/or task requirements shift over time. State-of-the-art systems struggle to adapt to such changes due to both hardware and algorithmic limitations. To overcome this, we propose separating the time scales of learning within tasks and across tasks into distinct but interacting learning mechanisms implemented on multi-core neuromorphic hardware.

  • - Fast learning (in-context learning): within-task adaptation will be handled by local learning algorithms in tightly coupled computing cores, adjusting synaptic conductances implemented with novel memory technologies (e.g., memristors).
  • - Slow learning (structural meta-learning): across-task adaptation will be achieved by rewiring connectivity across cores through structural plasticity algorithms in the routing cores, triggered by error signals or uncertainty measures.
  • - A bi-level learning approach will mediate the interplay between these two timescales.

A central theme of the project is cross-stack co-optimization: the interplay between new algorithmic principles and novel hardware architectures implemented on silicon and emerging nanoscale memory technologies (e.g., ferroelectric transistors, resistive memories). By grounding algorithmic innovations in the physical constraints and opportunities of novel devices, and vice versa, the project aims to deliver architectures that are both computationally powerful and energy efficient.

Eligibility

The project is part of the ELEVATE grant under Marie Skłodowska-Curie Actions (MSCA) training network, where PhD students get to work in collaboration between 10 academic and 10 industrial partners:

https://www.elevate-dn.eu/index.php/about/

Applicants must comply with the MSCA mobility rules: they must not have resided or carried out their main activity (work, studies, etc.) in Switzerland for more than 12 months in the last 36 months.

 

Required Profile

  • - MSc in computer science, electrical engineering, physics or related fields
  • - Strong coding skills, in particular experience with machine learning algorithms and software frameworks (e.g. PyTorch or Jax)
  • - Background in computer architecture and/or circuit design is a big plus
  • - Prior experience in computational neuroscience, in particular the modeling and training of SNNs is a plus
  • - Curiosity and critical thinking across disciplines 
  • - Passion for understanding biological intelligence and building artificial ones 
  • - The desire and collaborative spirit required to work closely in an interdisciplinary environment (on a daily basis you will work closely with neuroscientists, computer scientists, physicists and electrical engineers)
  • - Excellent written and oral communication skills in English

 

Your job

  • - Study learning rules connected to modern neural architectures and modify or redesign them to map on custom built hardware architectures.
  • - Conceive novel efficient learning solutions that take advantage of event-based and continuous dynamics of mixed-signal analog-digital hardware.
  • - Simulate models of the learning algorithm on practical problems, and analyze the robustness of the algorithms to hardware non-idealities (noise, limited connectivity, quantization, non-linearities, etc).
  • - Publish research articles, regular participation in top international conferences to present your work.
  • - Complete two internships:
    • - - RWTH Aachen (Prof. Emre Neftci co-supervisor), focusing on system-level and algorithmic-level modeling of slow/fast learning. 
    • - - CEA-Leti (Dr. Elisa Vianello), providing the memristor technology integrated with state-of-the-art CMOS, for guidance in understanding the device physics and consequently selecting the most suitable memristor technology for algorithm implementation.
  • - Participate in yearly retreats organized by the doctoral network participants.
  • - Supervise student projects and BSc/MSc theses.

 

Salary and conditions

The salary and benefits will follow the standards set by the University of Zurich for PhD students. PhD students will receive their degree from both the University of Zurich and the ETH Zurich.

 

Application process

Interested candidates should submit a detailed CV, a cover letter explaining their interest in the position (1 or 2 pages long), a transcript for your BSc and Msc d and the contact information of 2 references to melika@ini.uzh.ch with subject line: “ELEVATE R7 PhD”.

We strive to build a diverse work environment and encourage applications from all qualified individuals irrespective of their gender, age, cultural background, and disability status. Only candidates shortlisted for this position will be contacted for an interview.




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